Stacked solid electrolytic capacitor, integrated circuit product and electronic product

ABSTRACT

A stacked solid electrolytic capacitor is provided in the present disclosure. The stacked solid electrolytic capacitor includes a capacitive module, a conductive module and a packaging structure. The capacitive module includes capacitive units stacked up sequentially. The conductive module includes a positive terminal, a negative terminal and at least one anti-oxidizing layer. The positive terminal is electrically connected to one of the capacitive units. The negative terminal is electrically connected to the one of the capacitive units through a conductive paste layer. The at least one anti-oxidizing layer is arranged between the negative terminal and the conductive paste layer. The packaging structure surrounds the capacitive module and the conductive module. Therefore, it is difficult for an oxide layer forming between the negative terminal and the capacitive units, and the equivalent series resistance of the stacked solid electrolytic capacitor can be reduced.

RELATED APPLICATIONS

This application claims priority to Taiwan Application Serial Number109138317, filed Nov. 3, 2020, which is herein incorporated byreference.

BACKGROUND Technical Field

The present disclosure relates to a solid electrolytic capacitor. Moreparticularly, the present disclosure relates to a stacked solidelectrolytic capacitor which is able to reduce the equivalent seriesresistance.

Description of Related Art

Capacitor is one of the common passive electronic components in acircuit, and the functions of energy storage, decoupling, filtering orbypass can be achieved by the capacitor. In order to cope with thecoming-up electronic products with lightweight and versatility, thecapacitor gets continuous improvements on high capacity, high stability,low impedance and miniaturization. Therefore, capacitors of variousmaterials, such as ceramics, aluminum, tantalum or niobium, orstructures, such as wound-type capacitors and stacked-type capacitors,are developed.

The conventional stacked-type solid capacitor includes a capacitiveassembly and a conductive assembly. The conductive assembly is made ofmetals. The capacitive assembly and the conductive assembly areconnected by a conductive paste, which ensures that current can pass thecapacitive assembly and the conductive assembly successfully. However,the conductive assembly is prone to oxidation under long-term use or inthe manufacturing process of high temperature. An oxide layer will formbetween the capacitive assembly and the conductive assembly, resultingin the increment of the interfacial resistance between the capacitiveassembly and the conductive assembly. Thus, the equivalent seriesresistance of the stacked-type solid capacitor and the energy loss willincrease, which is likely to cause the capacitor to heat up and shortenthe life thereof.

In this regard, it is still an unsolved problem to reduce theinterfacial resistance between the capacitive assembly and theconductive assembly.

SUMMARY

According to the present disclosure, a stacked solid electrolyticcapacitor includes a capacitive module, a conductive module and apackaging structure. The capacitive module includes a plurality ofcapacitive units stacked up sequentially, and each of the plurality ofcapacitive units includes a positive portion and a negative portion. Thepositive portions of the plurality of capacitive units are electricallyconnected to each other, and the positive portions are bent toward aside of the capacitive module. The negative portions of the plurality ofcapacitive units are electrically connected to each other. Theconductive module includes a positive terminal, a negative terminal andat least one anti-oxidizing layer. The positive terminal is electricallyconnected to the positive portion of one of the plurality of capacitiveunits from the side of the capacitive module. The negative terminal iselectrically connected to the negative portion of the one of theplurality of capacitive units through a conductive paste layer. The atleast one anti-oxidizing layer is arranged between the negative terminaland the conductive paste layer. The packaging structure surrounds thecapacitive module and the conductive module, and the positive terminaland the negative terminal are partially uncovered by the packagingstructure.

According to the present disclosure, an integrated circuit productincludes the aforementioned stacked solid electrolytic capacitor.

According to the present disclosure, an electronic product includes theaforementioned stacked solid electrolytic capacitor.

BRIEF DESCRIPTION OF THE DRAWINGS

The present disclosure can be more fully understood by reading thefollowing detailed description of the embodiment, with reference made tothe accompanying drawings as follows:

FIG. 1 is a sectional schematic view of a stacked solid electrolyticcapacitor according to an embodiment of the present disclosure.

FIG. 2 is a partial enlarged schematic view of the region R in thestacked solid electrolytic capacitor of FIG. 1.

DETAILED DESCRIPTION

The examples of the present disclosure will be described below withreference to the drawings. For clear explanation, many practical detailswill also be explained in the following description. Furthermore, inorder to simplify the drawings, some conventional structures andelements will be illustrated in the drawings by a simple and schematicway.

Please refer to FIG. 1. FIG. 1 is a sectional schematic view of astacked solid electrolytic capacitor 100 according to an embodiment ofthe present disclosure. The stacked solid electrolytic capacitor 100includes a capacitive module 110, a conductive module 120 and apackaging structure 130. The capacitive module 110 and the conductivemodule 120 are electrically connected. The packaging structure 130surrounds the capacitive module 110 and the conductive module 120.

The capacitive module 110 includes a plurality of capacitive units 111stacked up sequentially. Even though three capacitive units 111 aretaken for example in FIG. 1, the present disclosure is not limited tothe number of the plurality of capacitive units 111. Each of theplurality of capacitive units 111 includes a positive portion 111 a anda negative portion 111 b. The positive portions 111 a are all benttoward a side of the capacitive module 110 and electrically connected toeach other. The negative portions 111 b are also electrically connectedto each other. Therefore, the plurality of capacitive units 111 areelectrically connected, and the capacity of the stacked solidelectrolytic capacitor 100 can be improved.

Please refer to FIG. 2. FIG. 2 is a partial enlarged schematic view ofthe region R in the stacked solid electrolytic capacitor 100 of FIG. 1.The conductive module 120 includes a positive terminal 121 and anegative terminal 122. The positive terminal 121 is electricallyconnected to the positive portion 111 a of one of the plurality ofcapacitive units 111 from the side of the capacitive module 110. Forexample, the positive terminal 121 can be connected to the positiveportion 111 a of the one of the plurality of capacitive units 111through welding. The negative terminal 122 is electrically connected tothe negative portion 111 b of the one of the plurality of capacitiveunits 111 through a conductive paste layer 123. The positive terminal121 and the negative terminal 122 can be made of copper or copper-zincalloy. With the aforementioned arrangement, a current can be applied tothe capacitive module 110 through the positive terminal 121 and thenegative terminal 122.

It is worth noticed that, the conductive module 120 further includes atleast one anti-oxidizing layer 124, which is arranged between thenegative terminal 122 and the conductive paste layer 123, so as toprotect the surface of the negative terminal 122 electrically connectedto the one of the plurality of capacitive units 111 and prevent an oxidelayer formed on the aforementioned surface. The at least oneanti-oxidizing layer 124 can be made of silver, gold, palladium,platinum, graphite, titanium nitride or titanium carbide. When the atleast one anti-oxidizing layer 124 is made of palladium, a thickness ofthe at least one anti-oxidizing layer 124 can be 0.1 nm-900 nm. When theat least one anti-oxidizing layer 124 is made of gold, a thickness ofthe at least one anti-oxidizing layer 124 can be 0.1 nm-500 nm. Aninterfacial resistance between the negative terminal 122 and theconductive paste layer 123 of the stacked solid electrolytic capacitor100, which includes the at least one anti-oxidizing layer 124, can beless than 1 mΩ. Thus, the equivalent series resistance of the stackedsolid electrolytic capacitor 100 can be effectively reduced.

It is worth noticed that, the at least one anti-oxidizing layer 124 caninclude a first anti-oxidizing layer and a second anti-oxidizing layer(which are not shown in the drawings). The first anti-oxidizing layerand the second anti-oxidizing layer are stacked up sequentially along adirection from the negative terminal 122 toward the conductive pastelayer 123. The first anti-oxidizing layer can be made of palladium, andthe second anti-oxidizing layer can be made of gold. By selecting andproperly assembling or arranging the at least one anti-oxidizing layer124 of different materials, the equivalent series resistance of thestacked solid electrolytic capacitor 100 can be further reduced. Theeffects of reducing the equivalent series resistance with multipleanti-oxidizing layers 124 will be shown in the following experiments,and the details will not be given herein.

The conductive module 120 can further include a nickel layer (which isnot shown in the drawings), and the nickel layer is arranged between thenegative terminal 122 and the at least one anti-oxidizing layer 124. Forexample, the nickel layer can be arranged between the negative terminal122 and the aforementioned first anti-oxidizing layer. The nickel layercan help the welding and also be a diffusion barrier layer, whichprevents metal atoms in the negative terminal 122 diffuse into thedielectric layer. Thus, the service life of the stacked solidelectrolytic capacitor 100 can be extended. A thickness of the nickellayer can be 0.1 μm-5 μm, so as to effectively block the metal atoms.

The packaging structure 130 surrounds the capacitive module 110 and theconductive module 120, and the positive terminal 121 and the negativeterminal 122 are partially uncovered by the packaging structure 130 forconnecting to a circuit. Because the delicate structures such as thecapacitive module 110 and the electrical connection between thecapacitive module 110 and the conductive module 120 are covered by thepackaging structure 130, these delicate structures can be well-protectedand the durability of the stacked solid electrolytic capacitor 100 canbe improved.

An integrated circuit product or an electronic product is provided inthe present disclosure. The integrated circuit product or the electronicproduct includes the aforementioned stacked solid electrolyticcapacitor. It can be understood that, from the foregoing descriptions,the equivalent series resistance of the stacked solid electrolyticcapacitor of the present disclosure is smaller. In the integratedcircuit product or the electronic product, the stacked solidelectrolytic capacitor is suitable as a decoupling capacitor forreducing noise, a filter capacitor for smoothing the current, a snubbercapacitor for protecting other electronic components, etc.

Measurements of conductive modules including different arrangements ofanti-oxidizing layers are performed as follows, so as to determinewhether the equivalent series resistance of the stacked solidelectrolytic capacitor can be reduced by arranging the anti-oxidizinglayer or not.

1. Different Arrangements of Anti-Oxidizing Layers

In the present experiment, the interfacial resistances of 1stComparison, 1st Example and 2nd Example are measured to find out whetherthe interfacial resistance from the negative terminal to the conductivepaste layer can be effectively reduced by arranging the anti-oxidizinglayer or not.

In 1st Example and 2nd Example, one or two anti-oxidizing layers arearranged between the copper negative terminal and the conductive pastelayer (silver paste with a thickness of 100 μm). The average resistanceis calculated from the interfacial resistances measured from thenegative terminal to the conductive paste layer for several times. Aconductive module without anti-oxidizing layer is taken as 1stComparison in the present experiment, so as to be compared with 1stExample and 2nd Example. The detailed structures and average resistancesof 1st Comparison, 1st Example and 2nd Example are listed in Table 1below.

TABLE 1 Structures and Resistances of 1st Comparison, 1st Example and2nd Example First Second Anti-Oxidizing Anti-Oxidizing Average LayerLayer Interfacial Thickness Thickness Resistance Material (nm) Material(nm) (mΩ) 1st Comparison 4.905 1st Example Gold 150 0.353 2nd ExamplePalladium 50 Gold 150 0.365

As shown in Table 1, the resistance of 1st Comparison is apparentlylarger than that of 1st Example and 2nd Example, which include theanti-oxidizing layers. That is because the copper material in thestructure without anti-oxidizing layer is prone to oxidation, andinsulating copper oxide will form on the surface of the negativeterminal, affecting the current passing through. On the contrary, themetal material can be protected from oxidation by the anti-oxidizinglayer, and the interfacial resistance between the negative terminal andthe conductive paste layer can be significantly reduced.

2. Different Thicknesses of Anti-Oxidizing Layers

In the present experiment, the equivalent series resistances of 2ndComparison and 3rd Example to 5th Example are measured to find out theeffects of reducing the equivalent series resistances with differentthicknesses of the anti-oxidizing layers.

The stacked solid electrolytic capacitors of 3rd Example to 5th Exampleinclude the copper negative terminal and two anti-oxidizing layersarranged between the negative terminal and the conductive paste layer.The thickness of one of the two anti-oxidizing layers is changed. Thestacked solid electrolytic capacitor of 2nd Comparison does not includethe anti-oxidizing layer. The capacities of the aforementionedcapacitors are all 470 μF. The average equivalent series resistance(average ESR) thereof is calculated from the equivalent seriesresistances measured under an alternating current of 100 kHz for severaltimes. The detailed structures and average ESR of 2nd Comparison and 3rdExample to 5th Example are listed in Table 2 below.

TABLE 2 Structures and ESR of 2nd Comparison and 3rd Example to 5thExample First Second Anti-Oxidizing Anti-Oxidizing Layer Layer AverageThickness Thickness ESR Material (nm) Material (nm) (mΩ) 2nd Comparison4.23 3rd Example Palladium 100 Gold 100 2.68 4th Example 80 100 2.85 5thExample 40 100 3.32

As shown in Table 2, the equivalent series resistance of 2nd Comparisonis apparently larger than that of 3rd Example to 5th Example, whichproves that the equivalent series resistance can be effectively reducedby arranging the anti-oxidizing layer. Moreover, when the thickness ofthe anti-oxidizing layer increases, the skin effect in the negativeterminal can be reduced, and the equivalent series resistance of thestacked solid electrolytic capacitor can further decrease.

In this regard, according to the stacked solid electrolytic capacitor ofthe present disclosure, the oxidation rate of the surface of thenegative terminal can significantly decrease by arranging theanti-oxidizing layer. It is difficult for an oxide layer forming betweenthe negative terminal and the capacitive units, and the interfacialresistance between the negative terminal and the capacitive units caneffectively decrease. Therefore, the equivalent series resistance of thestacked solid electrolytic capacitor can be reduced.

Although the present disclosure has been described in considerabledetail with reference to certain embodiments thereof, other embodimentsare possible. Therefore, the spirit and scope of the appended claimsshould not be limited to the description of the embodiments containedherein.

It will be apparent to those skilled in the art that variousmodifications and variations can be made to the structure of the presentdisclosure without departing from the scope or spirit of the disclosure.In view of the foregoing, it is intended that the present disclosurecover modifications and variations of this disclosure provided they fallwithin the scope of the following claims.

What is claimed is:
 1. A stacked solid electrolytic capacitor,comprising: a capacitive module, wherein the capacitive module comprisesa plurality of capacitive units stacked up sequentially, and each of theplurality of capacitive units comprises: a positive portion, wherein thepositive portions of the plurality of capacitive units are electricallyconnected to each other, and the positive portions are bent toward aside of the capacitive module; and a negative portion, wherein thenegative portions of the plurality of capacitive units are electricallyconnected to each other; a conductive module, comprising: a positiveterminal, electrically connected to the positive portion of one of theplurality of capacitive units from the side of the capacitive module; anegative terminal, electrically connected to the negative portion of theone of the plurality of capacitive units through a conductive pastelayer; and at least one anti-oxidizing layer, arranged between thenegative terminal and the conductive paste layer; and a packagingstructure, surrounding the capacitive module and the conductive module,wherein the positive terminal and the negative terminal are partiallyuncovered by the packaging structure.
 2. The stacked solid electrolyticcapacitor of claim 1, wherein the positive terminal and the negativeterminal are made of copper or copper-zinc alloy.
 3. The stacked solidelectrolytic capacitor of claim 1, wherein the at least oneanti-oxidizing layer is made of silver, gold, palladium, platinum,graphite, titanium nitride or titanium carbide.
 4. The stacked solidelectrolytic capacitor of claim 3, wherein the at least oneanti-oxidizing layer is made of palladium, and a thickness of the atleast one anti-oxidizing layer is 0.1 nm-900 nm.
 5. The stacked solidelectrolytic capacitor of claim 3, wherein the at least oneanti-oxidizing layer is made of gold, and a thickness of the at leastone anti-oxidizing layer is 0.1 nm-500 nm.
 6. The stacked solidelectrolytic capacitor of claim 3, wherein the at least oneanti-oxidizing layer comprises a first anti-oxidizing layer and a secondanti-oxidizing layer, the first anti-oxidizing layer and the secondanti-oxidizing layer are stacked up sequentially along a direction fromthe negative terminal toward the conductive paste layer, the firstanti-oxidizing layer is made of palladium, and the second anti-oxidizinglayer is made of gold.
 7. The stacked solid electrolytic capacitor ofclaim 6, wherein the conductive module further comprises a nickel layer,and the nickel layer is arranged between the negative terminal and thefirst anti-oxidizing layer.
 8. The stacked solid electrolytic capacitorof claim 7, wherein a thickness of the nickel layer is 0.1 μm-5 μm. 9.The stacked solid electrolytic capacitor of claim 1, wherein theconductive module further comprises a nickel layer, and the nickel layeris arranged between the negative terminal and the at least oneanti-oxidizing layer.
 10. The stacked solid electrolytic capacitor ofclaim 9, wherein a thickness of the nickel layer is 0.1 μm-5 μm.
 11. Thestacked solid electrolytic capacitor of claim 1, wherein an interfacialresistance between the negative terminal and the conductive paste layeris less than 1 mΩ.
 12. An integrated circuit product, comprising thestacked solid electrolytic capacitor of claim
 1. 13. An electronicproduct, comprising the stacked solid electrolytic capacitor of claim 1.